IBM, Oak Ridge, and AMD Put the Decoder Next to the Qubits

Chapter 12 of Quantum from the Ground Up covers NVIDIA's Ising Decoder, which ran 2.5 times faster than PyMatching with 3 times better logical error rates. I wrote about that NVIDIA AI system for drifting quantum hardware in June. Chapter 3 separates physics that works from engineering that makes it work. A November 5 announcement from IBM, Oak Ridge National Laboratory, and AMD adds a data point to both chapters. This post explains the announcement from the beginning, so you can follow it without a physics background.

Why Quantum Computers Need Error Correction

A qubit holds information in a fragile quantum state. Heat, stray electromagnetic fields, and small imperfections in the control signals all disturb that state. Each disturbance introduces an error. A useful calculation needs millions or billions of operations, so even a small error rate per operation ruins the result.

Quantum error correction addresses this. It stores the information of one logical qubit across many physical qubits. Extra qubits check the group repeatedly. Their measurements, called syndromes, show where an error probably occurred without revealing the stored data. Chapter 4 covers the basic idea. My post on two fault tolerance results in one week defines these terms in more detail, along with code distance and the color and surface code families.

What a Decoder Does

A decoder is a classical program. It reads the syndromes and decides which correction to apply. It runs on conventional hardware, not on the qubits. I described this classical computing layer inside every quantum computer in June. Qubits hold their state for only microseconds to milliseconds, so the decoder has a tight deadline. If it falls behind, errors pile up faster than it can fix them. That post reports that decoders run on FPGAs or ASICs for this reason. An FPGA is a chip whose circuits can be reconfigured for one job. An ASIC is a chip built permanently for one job.

Latency is the delay between sending data and getting an answer. Every cable and network hop adds some. A decoder in a distant data center adds latency to every round of measurements, which makes the deadline harder to meet. The same June post quotes Riverlane's argument that GPUs add latency even when their throughput is high. A GPU is a processor built to run many calculations at the same time. That argument sets up the November 5 announcement.

What IBM, Oak Ridge, and AMD Built

IBM, the Department of Energy's Quantum Science Center at Oak Ridge, and AMD unveiled a co-design platform for quantum error correction. Co-design means the quantum and classical hardware are developed and tested together. The first deployment sits at IBM's Poughkeepsie, New York site. It co-locates the 120-qubit Nighthawk with Umbra, an Oak Ridge supercomputer built on AMD Instinct MI355X GPUs and 5th Gen EPYC CPUs. Co-location means both systems share one facility. The Quantum Computing Report describes the design as aimed at eliminating long-distance wide-area network (WAN) latency between the quantum control hardware and remote supercomputers, relying instead on direct high-speed local interconnects. Researchers can test error correction on real quantum hardware without building that infrastructure themselves. IBM also joined two cryogenic modules in August and plans to install Nighthawk processors in 2026.

A decoder in a separate facility compared with the co-located platform. Simplified illustration.

Nighthawk gives researchers square-lattice connectivity and real-time pulse control. Square-lattice connectivity means each qubit links to its neighbors on a grid. That layout suits many error correction codes. Pulse control means researchers can adjust the signals that operate the qubits directly. IBM also names hierarchical codes as a promising approach. These codes stack several layers of correction, and they depend on strong classical compute. The platform lets researchers test those codes with GPUs in a low-latency setting. The announcements I found report no decoder timing results yet, so the question of whether GPUs can meet decoding deadlines at this scale stays open. One analyst firm frames error correction as a competition to supply classical silicon.

How It Fits With Other Results

Quantinuum reported 99.9995 percent logical fidelity on Helios on October 19. Logical fidelity measures how often a logical operation finishes without an error. At 99.9995 percent, about 5 operations in a million fail. IBM Research Director Jay Gambetta said the open task is speeding up and optimizing error correction. The Department of Energy's Quantum Genesis initiative targets fault-tolerant systems by 2028. My post on the $215 million Q Competition covers its requirement of at least 100 logical qubits. The partners say this platform supports that goal.

Terms to Know

•       Physical qubit: an actual hardware qubit, such as a superconducting circuit or a trapped ion.

•       Logical qubit: one error-protected qubit built from many physical qubits.

•       Syndrome: a measurement that shows where an error likely occurred.

•       Decoder: classical software and hardware that turns syndromes into corrections.

•       Latency: the delay between sending data and receiving the result.

•       Co-location: placing two systems in one facility to shorten the path between them.

What This Changes in the Book

Chapter 12 treats decoding mainly as a software and AI problem, with NVIDIA's Ising Decoder as the example. Add a hardware dimension. AMD hardware now supplies the classical compute for decoder research at Oak Ridge, and IonQ runs a real-time decoder on one standard CPU in simulation. The chapter should also note the distinction between microsecond-level real-time decoding—where FPGAs and ASICs remain the established choice—and near-real-time or multi-layer hierarchical decoding suited for GPU clusters. Chapter 3 gains a current example of engineering work, since the platform exists to answer integration questions. Chapter 6 gets a companion figure from Quantinuum. Logical fidelity and the 99.99 percent two-qubit gate fidelity cited for IonQ measure different things, so the chapter should list them separately, as I noted in October.

This post will appear in the next edition of Quantum from the Ground Up. You can download the current edition from the second edition announcement.